1/10 april 2004 high speed: t pd = 4.7ns (typ.) at v cc =5v low power dissipation: i cc =1 a(max.) at t a =25c compatible with ttl outputs: v ih =2v(min),v il =0.8v(max) power down protection on inputs symmetrical output impedance: |i oh |=i ol =8ma(min)atv cc =4.5v balanced propagation delays: t plh ? t phl operating voltage range: v cc (opr) = 4.5v to 5.5v improved latch-up immunity description the 74V1T77 is an advanced high-speed cmos single d-type latch fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. it is designed to operate from 4.5v to 5.5v, making this device ideal for portable applications. the single d-type latch is controlled by an latch enable input (le). while the le input is held at a high level, the q output will follow the data input precisely. when the le input is taken low the q output is latched precisely at the logic level of d data input. power down protection is provided on inputs and 0 to 7v can be accepted on inputs with no regard to the supply voltage. this device can be used to interface5vto3v. it?s available in the commercial and extended temperature range. all inputs and output are equipped with protection circuits against static discharge, giving them esd immunity and transient excess voltage. 74V1T77 single d-type latch pin connection and iec logic symbols order codes package t & r sot23-5l 74V1T77str sot323-5l 74V1T77ctr sot323-5l sot23-5l
74V1T77 2/10 input and output equivalent circuit pin description truth table (*) q output is latched at the time when the le input is taken low logic level. absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied recommended operating conditions 1) v in from 0.8v to 2v pin n symbol name and function 1 d data input 2 le latch enable input 4 q data output 3 gnd ground (0v) 5 v cc positive supply voltage dleq l l no change * h l no change * lhl hhh symbol parameter value unit v cc supply voltage -0.5 to +7.0 v v i dc input voltage -0.5 to +7.0 v v o dc output voltage -0.5 to v cc +0.5 v i ik dc input diode current -20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 4.5 to 5.5 v v i input voltage 0to5.5 v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time (note 1) (v cc =5.0 0.5v) 0 to 20 ns/v
74V1T77 3/10 dc specifications ac electrical characteristics (input t r =t f =3ns) (*) voltage range is 5.0v 0.5v capacitive characteristics 1) c pd is defined as the value of the ic?s internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) =c pd xv cc xf in +i cc symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 4.5 to 5.5 222v v il low level input voltage 4.5 to 5.5 0.8 0.8 0.8 v v oh high level output voltage 4.5 i o =-50 a 4.4 4.5 4.4 4.4 v 4.5 i o =-8 ma 3.94 3.8 3.7 v ol low level output voltage 4.5 i o =50 a 0.0 0.1 0.1 0.1 v 4.5 i o =8 ma 0.36 0.44 0.55 i i input leakage current 0to 5.5 v i =5.5vorgnd 0.1 1.0 1.0 a i cc quiescent supply current 5.5 v i =v cc or gnd 11020 a + i cc additional worst case supply current 5.5 one input at 3.4v, other input at v cc or gnd 1.35 1.5 1.5 ma symbol parameter test condition value unit v cc (v) c l (pf) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t plh t phl propagation delay time le to q 5.0 (*) 15 4.4 6.5 1.0 7.5 1.0 8.5 ns 5.0 (*) 50 4.8 7.0 1.0 8.0 1.0 9.0 t plh t phl propagation delay time d to q 5.0 (*) 15 4.7 6.5 1.0 7.5 1.0 8.5 ns 5.0 (*) 50 5.3 7.0 1.0 8.0 1.0 9.0 t w le pulse width, high 5.0 (*) 3.0 3.0 3.0 ns t s setuptimedto le, high or low 5.0 (*) 2.0 2.0 2.0 ns t h hold time d to le, high or low 5.0 (*) 1.0 1.0 1.0 ns symbol parameter test condition value unit t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 410 10 10pf c pd power dissipation capacitance (note 1) 8pf
74V1T77 4/10 test circuit c l = 15/50pf or equivalent (includes jig and probe capacitance) r t =z out of pulse generator (typically 50 ? ) waveform 1: le to qn propagation delays, le minimun pulse width, dn to le setup and hold times (f=1mhz; 50% duty cycle)
74V1T77 5/10 waveform 2: propagation delay time (f=1mhz; 50% duty cycle)
74V1T77 6/10 dim. mm. mils min. typ max. min. typ. max. a 0.90 1.45 35.4 57.1 a1 0.00 0.10 0.0 3.9 a2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 c 0.09 0.20 3.5 7.8 d 2.80 3.00 110.2 118.1 e 1.50 1.75 59.0 68.8 e0.95 37.4 h 2.60 3.00 102.3 118.1 l 0.10 0.60 3.9 23.6 sot23-5l mechanical data 7049676c .
74V1T77 7/10 dim. mm. mils min. typ max. min. typ. max. a 0.80 1.10 31.5 43.3 a1 0.00 0.10 0.0 3.9 a2 0.80 1.00 31.5 39.4 b 0.15 0.30 5.9 11.8 c 0.10 0.18 3.9 7.1 d 1.80 2.20 70.9 86.6 e 1.80 2.40 70.9 94.5 e1 1.15 1.35 45.3 53.1 e .65 25.6 e1 1.3 51.2 l 0.10 0.30 3.9 11.8 sot323-5l mechanical data 0
74V1T77 8/10 dim. mm. inch min. typ max. min. typ. max. a 180 7.086 c 12.8 13.0 13.2 0.504 0.512 0.519 d 20.2 0.795 n 60 2.362 t 14.4 0.567 ao 3.13 3.23 3.33 0.123 0.127 0.131 bo 3.07 3.17 3.27 0.120 0.124 0.128 ko 1.27 1.37 1.47 0.050 0.054 0.0.58 po 3.9 4.0 4.1 0.153 0.157 0.161 p 3.9 4.0 4.1 0.153 0.157 0.161 tape & reel sot23-xl mechanical data
74V1T77 9/10 dim. mm. inch min. typ max. min. typ. max. a 175 180 185 6.889 7.086 7.283 c 12.8 13 13.2 0.504 0.512 0.519 d 20.2 0.795 n 59.5 60 60.5 2.362 t 14.4 0.567 ao 2.25 0.088 bo 2.7 0.106 ko 1.2 0.047 po 3.9 4 4.1 0.153 0.157 0.161 p 3.8 4 4.2 0.149 0.157 0.165 tape & reel sot323-xl mechanical data
74V1T77 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
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